What is CMOS?

CMOS or MOS gates (Complementary Metal-Oxide Semiconductor) refer to the use of two types of transistors in the output circuit in a configuration similar to the TTL family totem pole.

What is CMOS (Complementary Metal-Oxide Semiconductor)?

Both n-channel (NMOS) and p-channel (PMOS) MOSFETs (MOS Field Effect Transistors) are used together in the same circuit to achieve several advantages over the P-MOS and N-MOS families. This technology is now dominant because it is faster and consumes less power than other MOS families.

These advantages are somewhat overshadowed by the high complexity of the IC fabrication process and the lower integration density. Therefore, it still cannot compete with MOS in applications that require the latest in LSI.

Properties

1) Charge Factor

Like N-MOS and P-MOS, CMOS also has a considerable input resistance (10 * 12Ω) that draws almost no current from the signal source. Each input usually represents a 5pF ground load. Due to the input capacitance, the number of inputs that a single output can process is limited.

Therefore, the load factor depends on the maximum allowable propagation delay. Usually, this load factor is 50 for low frequencies (<1 MHz). Of course, the load factor decreases for high frequencies.

The CMOS output must charge and discharge the parallel combination of each input capacitance. Thus, the output switching time increases in proportion to the number of driven loads. That is, each load increases the conduction delay of the circuit propagation by three ns. Thus, we can conclude that the load factor depends on the maximum allowable propagation delay.

2) Switching Speed

It has to use relatively large load capacitances such as N-MOS and P-MOS. In each case, the switching speed is higher due to the low output resistance. Recall that an N-MOS output must load the load capacitance with a relatively large resistance (100 kΩ).

In a CMOS circuit, the output resistance in the HIGH state is the RON value of the P-MOSFET, which is usually 1 kΩ or less. This allows the charging capacitance to be charged faster. The switching speed values ​​depend on the supply voltage used, for example, in a 4000 series NAND gate. Thus, the propagation time is 50 ns for VDD = 5 V and 25 ns for VDD = 10 V.

As we can see, we can operate at higher frequencies even though VDD is larger. Of course, the power loss increases as VDD increases. A 74HC or 7411CT series NAND gate has an average tpd of around 8 ns when operating with VDD = 5V. This speed is comparable to the speed of the 74LS series.

3) Power Distribution

We can view the power dissipation as a constant function of the frequency of a TTL gate within its operating range. Instead, it depends on the frequency in a CMOS gate.

In the DC case, the power dissipation of the DCOS CI will be very low. Unfortunately, the PD will always grow proportionally to the frequency with which the circuits change state. Every time an output goes from LOW to HIGH, a momentary oscillating load current must be supplied to the load capacitance.

This capacitance consists of the combined input capacitances of the driven loads and the output capacitance of the device itself. VDD supplies these short current pins. Moreover, they can have an average amplitude of 5 mA and a duration of 20 to 30 ns.

As the switching frequency increases, there will be more of these current increments per second. However, the average VDD current consumption will increase. Therefore, at high frequencies, it starts to lose some of its advantages over other logic families.

As a general rule, a gate will have the same PD as the average 74LS gate at frequencies around dc 2 to 3 MHz. The situation for CI MSI is more complex than expressed here, and a logic designer must perform a detailed analysis to determine whether CMOS has a power dissipation advantage at a particular operating frequency.

4) Supply Voltage

TTL bipolar circuits require a volt power supply that tolerates only a tiny amount of drift. The circuits allow for a more extensive power range of +2 to +6 volts for the HC and AC series and +3 to +15 volts for the 4000 and 74CXX series.

However, there are two CMOS series, the HCT and ACT, that are designed to be compatible with TTL circuits and therefore require a +5 volt supply.

5) Entry Levels

When a TTL input is in the L (low) state, it provides current to the circuit that generates the L signal (typically 0.25 mA for the LS series).

This should be taken into account when feeding other types of circuits to TTL gates. Conversely, in a CMOS circuit, there is no input current. The input threshold required in a TTL gate to cause a change in output is about two diode breaks. However, this threshold is about half that of a power supply, with significant dissipation typically between 1/3 and 2/3 of the power supply.

The HCT and ACT families, which are compatible with TTLs, are designed to have a similarly low input threshold to TTLs. As we have seen, this is because the H (high) output does not reach +5 volts in TTL circuits.

CMOS inputs are susceptible to permanent damage from static electricity during use. Unused inputs should be connected to H or La as appropriate.

Differences Between CMOS and TTL Families

The most important differences between both families;

1. In the production of integrated circuits, bipolar transistors are used for TTL and MOSFET transistors for CMOS technology.
2. It requires much less space due to its compact MOSFET transistors. Moreover, due to its high integration density, it outperforms bipolar ICs in large-scale integration in LSIs, significant memories, calculator ICs, microprocessors, and VLSIs.
3. Integrated circuits have lower power consumption than TTLs.
4. It has a slower operating speed than TTLs.
5. It has higher noise immunity than TTLs.
6. It has a more extensive voltage range and a higher load factor than TTLs.

In summary, we can say that TTL is designed for high speed. CMOS is designed for low consumption. Currently, within these two families, others have been created to try to achieve the best of both. That is low consumption and high speed. The ECL logic family is between TTL and CMOS. This family was born to reach the speed of TTL and low consumption of CMOS, but it is rarely used.

Advantages Over TTL

In the MSI field, it began to grow steadily, primarily at the expense of TTL, with which it competed directly.

The manufacturing process is more straightforward than TTL and has a higher integration density. This allows for more circuitry on a given substrate area, reducing the cost per function. The most significant advantage of CMOS is that it uses only a fraction of the power required for the low-power TTL series. This is ideal for applications that use or sit on a battery.

Its disadvantage is that it is slower than the TTL family. However, the new HCMOS high-speed series, which came out in 1983, could compete with the advanced bipolar series in terms of speed and current availability at lower levels.

Areas of Use of CMOS Technology

CMOS technology has many advantages over other logic families. It is also widely used in various applications.

• Low Power Consumption: CMOS is known for its low power consumption. Therefore, it is ideal for mobile phones and IoT devices. It is also perfect for extending battery life.
• High-Speed ​​Integrated Circuits: This integrated circuit can operate at high speed. Therefore, it is suitable for microprocessors and digital signal processors. It is also used in high-speed communication devices.
• Analog and Mixed Signal Circuits: It can integrate analog and digital functions. Therefore, it is ideal for data converters and audio amplifiers. It also maintains low power consumption.
• Low Noise Amplifiers: They have low noise characteristics. Therefore, it is suitable for wireless communication devices and medical sensors. It is also used in applications requiring high sensitivity.

As a result, CMOS technology offers various advantages. It stands out for its low power consumption, high speed, and low noise characteristics. Therefore, it is an excellent choice in many applications.